The present invention relates to a semiconductor device such as a diode or an IGBT (Insulated Gate Bipolar Transistor) having soft recovery characteristics in addition to high-speed and low-loss characteristics, and a method for producing the semiconductor device.
There are diodes or IGBTs of 600 V, 1200 V or 1700 V withstand voltage class as power semiconductor devices. Improvement of characteristics of these devices has advanced recently. The power semiconductor devices are used in power conversion systems such as a high-efficiency power-saving converter-inverter system and essential for controlling rotation motors and servomotors.
Characteristics of low loss, power saving, high speed, high efficiency and environmental friendliness, that is, no bad influence on surroundings are required of such a power controller. For such requirements, there is commonly known a method of thinning a rear surface of a usual semiconductor substrate (e.g. silicon wafer) by means of grinding or the like after formation of a front surface side region of the semiconductor substrate and then performing ion-injection of an element with a predetermined concentration from the ground surface side and heat treatment (e.g. see Patent Document JP-T-2002-5208851).
For reduction of loss of the semiconductor device, it is necessary to improve the trade-off relationship between turn-off loss and conduction loss (on-voltage). Specifically, when, for example, the surface gate structure is formed as a trench gate structure, the trade-off relationship is improved. When injection of minority carrier from a P+ collector layer to an N− drift layer is suppressed to reduce the carrier concentration of the N− drift layer, the trade-off relationship is improved. In addition, when the N− drift layer is thinned to such a degree that the withstand voltage is not reduced, the trade-off relationship is improved.
FIG. 19 is a view showing the configuration of a semiconductor device having a field stop layer formed according to the related art and the net doping concentration thereof. As shown in a section 400 of the semiconductor device in FIG. 19, for example, an N+ field stop layer 42 and a P+ collector layer 43 are formed in this order on one principal surface side of an N− drift layer 41. A P base layer 44 is formed on the other principal surface side of the N− drift layer 41. An N source layer 45 is formed on part of a front surface layer of the P base layer 44 so as to be far from the N− drift layer 41. A gate electrode 47 is formed through a gate insulating film 46 in a trench which passes through the N source layer 45 and the P base layer 44 and reaches the N− drift layer 41. An emitter electrode 48 is formed on a surface of the P base layer 44 and the N source layer 45. A collector electrode 49 is formed on a surface of the P+ collector layer 43.
As shown in a characteristic graph 410 of distance from the emitter electrode versus net doping concentration (log) in FIG. 19, the net doping concentration of the N+ field stop layer 42 has a peak near the interface between the N+ field stop layer 42 and the P+ collector layer 43 and higher than the net doping concentration of the N− drift layer 41. Both the net doping concentrations of the P+ collector layer 43 and the P base layer 44 are higher than the net doping concentrations of the N− drift layer 41 and the N+ field stop layer 42.
The size of the semiconductor device shown in FIG. 19 is exemplified as follows. The size is based on the interface between the P base layer 44 and the emitter electrode 48 and expressed in distance from this interface except as otherwise noted. The distance to the interface between the P base layer 44 and the N− drift layer 41 is 3 μm. The distance to the interface between the P+ collector layer 43 and the collector electrode 49 is 140 μm. The distance from the interface between the N+ field stop layer 42 and the P+ collector layer 43 to the interface between the P+ collector layer 43 and the collector electrode 49, that is, the thickness of the P+ collector layer 43 is 0.5 μm. The distance from the interface between the N− drift layer 41 and the N+ field stop layer 42 to the interface between the P+ collector layer 43 and the collector electrode 49 is 30 μm.
The net doping concentration of the P base layer 44 takes 5×1016 atoms/cc at the interface between the P base layer 44 and the emitter electrode 48, decreases in the direction of the N− drift layer 41 and takes a value lower than 5×1013 atoms/cc at the interface between the P base layer 44 and the N− drift layer 41. The net doping concentration of the P+ collector layer 43 takes 1×1018 atoms/cc at the interface between the P+ collector layer 43 and the collector electrode 49, decreases in the direction of the N+ field stop layer 42 and takes a value lower than 5×1013 atoms/cc at the interface between the P+ collector layer 43 and the N+ field stop layer 42. The net doping concentration of the N− drift layer 41 is 5×1013 atoms/cc. The maximum value of the net doping concentration of the N+ field stop layer 42 is higher than 5×1013 atoms/cc.
With respect to the semiconductor device shown in FIG. 19, a method in which the N+ field stop layer 42 higher in impurity concentration than the N− drift layer 41 is formed between the P+ collector layer 43 and the N− drift layer 41 by means of ion injection and thermal activation, for example, after the rear surface of an FZ wafer is ground has been disclosed in Patent Document 1. By the method, injection of minority carriers from the P+ collector layer 43 is reduced so that the on-voltage can be reduced without increase of the turn-off loss.
Further, a method in which after phosphorus serving as the N+ field stop layer and boron serving as the P+ collector layer are ion-injected into a position deep from the rear surface of the wafer, the surface injected with ions is irradiated with two kinds of laser beams different in wavelength is commonly known. According to this method, there is no influence on the MOS gate structure and the metal electrode in the front surface of the wafer, so that damage caused by ion injection into the rear surface of the wafer can be eliminated to recover crystallinity. When, for example, a GaAs (gallium arsenide) semiconductor laser with a wavelength of about 800 nm is used as a long-wavelength laser which is one of the two types of lasers different in wavelength, ions at a depth of about 3 μm from the surface injected with ions can be activated effectively (e.g. see Patent Document WO 2007/015388).
There has been also disclosed a method of activating phosphorus or boron by irradiating the ion-injected surface with a laser beam of one kind of wavelength once or several times at different timing of irradiation after ion injection of phosphorus into a deep position of the rear surface of the wafer. For example, a method of activating phosphorus injected at a depth of about 1.5 μm from the injected surface by controlling the full width at half maximum of the third harmonic (YAG 3ω laser: 355 nm wavelength) of a YAG (Yttrium Aluminum Garnet) laser or the second harmonic (YAG 2ω laser: 532 nm wavelength) of the YAG laser is commonly known (e.g. see Patent Document JP-A-2003-59856 or JP-A-2002-314084).
A method of activating phosphorus injected at a depth of about 1.5 μm from the injected surface by irradiating a tilted substrate with a YAG 2ω laser is also commonly known (e.g. see Patent Document JP-A-2007-059431). A method of activating phosphorus injected at a depth of about 1 μm from the rear surface of the wafer by irradiation with a YAG laser several times is further commonly known (e.g. see Patent Document JP-A-2007-123300). A method of activating phosphorus injected at a depth of about 1 μm from the rear surface of the wafer by irradiation with a GaAs semiconductor laser (690-900 nm wavelength) is further commonly known (e.g. see Patent Document JP-A-2006-351659).
There has been also proposed a technique of forming an N+ field stop layer from a hydrogen-induced donor by injecting not phosphorus but light ions such as hydrogen ions at a high acceleration voltage and performing heat treatment. For example, a method of forming an N+ field stop layer from donor protons by injecting protons into a depth of about 10 μm from the rear surface of the wafer at an acceleration voltage of about 1 MeV and performing heat treatment at 400° C. or higher for two hours or more in an electric furnace is commonly known (e.g. Patent Document JP-A-2006-344977). A method of widening the width of the N+ field stop layer by injecting protons at several stages is also commonly known (e.g. see US Patent Application Publication No. 2006/0081923 or Patent Document JP-T-2003-533047).
The present applicant has proposed a method of injecting protons into an oxygen-including silicon substrate (e.g. see Patent Document WO 2007/055352). According to this method, reduction of carrier mobility caused by injection damage can be suppressed. In addition, a donor several times higher in concentration than only the hydrogen-induced donor can be induced because of the compound defect of oxygen and hydrogen included in the silicon substrate.
FIG. 20 shows results of SRIM2006's calculation of the projected range Rp of protons in silicon irradiated with protons and the full width at half maximum (FWHM) ΔRp thereof in a hydrogen distribution after the irradiation. As shown in FIG. 20, it is found that the projected range Rp and the FWHM ΔRp increase as the acceleration voltage increases.
A further method of forming an N+ field stop layer in a region near a P+ collector layer with respect to the center of an N− drift layer so that the N+ field stop layer does not come into contact with the P+ collector layer has been disclosed in JP-A-2004-19212 or JP-A-2002-305305. This structure can be formed by combination of epitaxial growth and ion injection using phosphorus or arsenic.
A further method of performing local lifetime control (control of lifetime killer introduction quantity) due to irradiation with light ions such as protons or helium ions has been disclosed in JP-A-2001-102392 or Japanese Patent No. 3413021. Particularly in Japanese Patent No. 3413021, there has been disclosed the concentration of phosphorus in which the lifetime of an N+ field stop layer formed based on phosphorus becomes longer than that of an extremely short lifetime region generated by lifetime control. A further method of forming an N+ field stop layer by laser annealing after irradiation with phosphorus ions or protons has been disclosed (e.g. see Japanese Patent No. 3885598 or Japanese Patent No. 3684962).
In the technique disclosed in JP-T-2002-520885, the final thickness of the wafer however needs to be thin to be about 100 μm particularly in the semiconductor device of a 600 V or 1200 V withstand voltage class, so that the wafer is broken easily at the time of handling. Therefore, to reduce the number of wafer processing steps in a thin state of the wafer as sufficiently as possible, the MOS gate structure and the metal electrode are formed in the front surface of the wafer before the rear surface of the wafer is ground. In the activating process after grinding, heat treatment must be performed at a low temperature not higher than the melting point of the electrode material (e.g. at a temperature not higher than 450° C. and, preferably, at a temperature of about 400° C. when the electrode material is aluminum) because the electrode has been already formed in the front surface of the wafer. There is hence a problem that it is difficult to activate the impurity sufficiently.
In the techniques disclosed in WO 2007/015388, JP-A-2003-59856, JP-A-2002-314084, JP-A-2007-059431, JP-A-2007-123300, and JP-A-2006-351659, the spreading coefficient of phosphorus is so small that phosphorus can be only spread to a depth of about 3 μm from the rear surface of the wafer even when, for example, heat treatment is performed at 1150° C. for 1 hour. Moreover, since the electrode has been already formed in the front surface of the wafer, the temperature for heat treatment after injection cannot be set at a high temperature of 1150° C. and must be set at a low temperature not higher than the melting point of the electrode material. For this reason, phosphorus cannot be spread in silicon so that only about 10% or less of injected phosphorus can be activated by covalent bonding to adjacent silicon in a defective position. Accordingly, the N+ field stop layer can be formed only in a position about 1.5 μm deep from the rear surface of the wafer.
In particular, JP-A-2007-059431 has described that the laser wavelength is set to be shorter than 600 nm because deterioration of device characteristic is caused by increase of the temperature of the MOS gate structure on the front surface side of the substrate when the penetration depth of the laser into the silicon substrate becomes larger. When an element such as phosphorus slow in progress of spreading is used as described above, there is a problem that the N+ field stop layer cannot be formed in a position deep from the injected surface by heat treatment in an electric furnace or laser annealing.
It has been found that there is a problem that the device is destroyed by a snap-back phenomenon caused by flowing of an avalanche current at the time of measuring the withstand voltage of the device in an off state in the trench gate type IBGT when the depth of the N+ field stop layer is about 1.5 μm. Specifically, an avalanche current flows when the positive voltage applied to the collector electrode reaches the withstand voltage of the device in the condition that the gate electrode is electrically connected to the emitter electrode in order to measure the withstand voltage of the device with a curve tracer CT-370A made by Tektronix, Inc. For example, in the case of a 1200 V class device, an avalanche current flows when the voltage reaches about 1400 V. When the current reaches about 100 μA/cm2, negative resistance is exhibited to reduce the voltage rapidly so that the device is destroyed by concentration of the current into one place of the chip. However, this phenomenon does not occur in a punch-through type IGBT produced by use of an epitaxial wafer and a non-punch-through type IGBT produced by use of an FZ bulk wafer.
In the technique disclosed in WO 2007/015388, phosphorus and boron at a depth of about 3 μm from the rear surface side of the substrate can be melted at 1400° C. or higher while increase of the temperature of the front surface of the substrate is suppressed to 400° C. or lower. However, the region in which phosphorus can be activated is about 3 μm whereas the penetration length of the laser with a long wavelength of 808 nm is 17.5 μm. Accordingly, in atoms such as phosphorus having a relatively small spreading coefficient, crystal recovery and donor activation due to substitution for defects can be achieved only in a region about one sixth the penetration length of the laser. For this reason, there is a problem that the merit of the long-wavelength laser to increase the penetration length cannot be used sufficiently.
JP-T-2002-520885 has disclosed a method of forming an N+ field stop layer by using atoms such as selenium (Se) or sulfur (S) having a larger spreading coefficient than that of phosphorus. According to the technique disclosed in Patent Document 1, an N+ field stop layer can be formed in a position about 15-20 μm deep from the rear surface of the wafer by spreading. When the N+ field stop layer is formed in a deep position of the rear surface of the wafer in this manner, the snap-back phenomenon does not occur. However, in order to form the N+ field stop layer in a position about 15-20 μm deep from the rear surface of the wafer, heat treatment, for example, at 1000° C. must be performed for 1 hour. Accordingly, the N+ field stop layer must be formed before the MOS gate structure and the electrode are formed in the front surface of the wafer. There is hence a problem that the possibility of breaking of the wafer increases because the number of wafer processing steps in a thin state of the wafer increases.
In the aforementioned technique disclosed in JP-A-2006-344977, US Patent Application Publication No. 2006/0081923, Japanese Patent No. 3885598 or Japanese Patent No. 3684962, the N+ field stop layer can be formed by grinding the rear surface of the wafer after formation of the surface structure and the electrode in the front surface of the wafer and injecting light ions such as protons in a position deep from the ground surface to make the light ions serve as donors. Accordingly, the number of wafer processing steps in a thin state of the wafer can be reduced. However, an activating process must be performed in an electric furnace for 2 hours or more, preferably, 2.5 hours or more after irradiation with protons. There is a problem that throughput is lowered. In addition, the reason and effect of the depth of injection of light ions such as protons are obscure.
Moreover, in the technique disclosed in US Patent Application Publication No. 2006/0081923, there is a problem that increase in cost is caused by increase in the number of irradiations because protons are injected in the form of a plurality of steps. Although there is description that the temperature for heat treatment is not lower than 400° C., characteristics such as contact deteriorate because the electrode having been already formed in the front surface of the wafer is scorched or oxidized when, for example, the temperature reaches 500° C. or higher. In addition, the description of treating time is obscure.
Moreover, in the technique disclosed in JP-A-2006-344977 or US Patent Application Publication No. 2006/0081923, the width of the N+ field stop layer is about 2 μm. The reason is that the full width at half maximum (FWHM) in the horizontal direction is 0.7 μm because the acceleration voltage is 1.0 MeV. Accordingly, the N+ field stop layer is so narrow that change of electric field intensity in the N+ field stop layer becomes precipitous. Accordingly, when the depletion layer reaches the N+ field stop layer in a turn-off state, the voltage amplification rate (dV/dt) increases to cause electromagnetic noise. In addition, in order to make the narrow N+ field stop layer perform its function, a concentration of at least 2×1015 atoms/cm2 is required. There is hence a problem that throughput is lowered because the dose quantity of injected protons must be set at 1×1015 atoms/cm2 or more. On the other hand, when the concentration of the N+ field stop layer is reduced, there is a problem that the leakage current increases.